Addressing Silent Data Errors for Resilient Data Centers

Open Compute Project Foundation

Understand the dangers of silent data errors in silicon and how it can be detected and managed.

Description:Silent Data Corruptions (SDCs) or Silent Errors are the most insidious kinds of errors that can happen in computing systems. Essentially, there is a defect or an unpredicted problem inside the computing chip that was not found during manufacturing testing and that inconsistently changes computation results. The industry is struggling to profile, root cause and eliminate these errors. Today, the common methods that exist to deal with these problems rely heavily on building a resilient software that can detect and correct these errors and on technologies like dual modular redundancy (DMR) and triple modular redundancy (TMR) which double or triple the amount of hardware needed per compute cycle. But these approaches are not sustainable in the long term and increase operational costs. In this webinar, we will discuss, alongside several industry experts, the magnitude of the problem, the effects it has on the users’ trust of the system and the current best practices available techniques to deal with it. We will investigate innovative mechanisms that will greatly assist in reducing the magnitude of SDCs and how these solutions can optimize datacenter operations.Presenters (learn more below):<ul><li>C﻿liff Grossner (Moderator): <a href="https://www.opencompute.org/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">OCP</a></li><li>Ashish Nadkarni (Analyst): <a href="https://www.idc.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">IDC</a><a href="https://www.delloro.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer"></a></li><li>Rama Govindaraju (Panelist): <a href="https://www.google.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Google</a><a href="https://www.amd.com/en" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer"></a></li><li>Walter Abramsohn (Panelist): <a href="https://www.proteantecs.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">proteanTecs</a><a href="https://www.idc.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer"></a></li></ul>During the webinar, you’ll learn: <ul><li>What is the magnitude of silent data corruption</li><li>How does SDC impact end users</li><li>What is the cost of detecting SDC using traditional methods </li><li>Novel techniques for detecting and mitigating SDC</li><li>Data Center efficiencies improvement with better SDC containment </li></ul>Who should attend? Silicon Vendors, Server, Networking and Storage Architects, Data Center Equipment Vendors, Cloud providers, IT buyers and Decision Makers, and Enterprise CIO and CTOMeet the speakers!

Cliff Grossner, VP Market Intelligence &amp; Innovation at <a href="https://www.opencompute.org/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">OCP</a>At the Open Compute Project Foundation, Dr. Grossner leads its market intelligence function and is responsible for driving awareness of OCP, training and certification programs, and guiding inventors presenting their early-stage company ideas to potential investors. Dr. Grossner has more than 25 years of telecommunications industry experience encompassing scientific research, market analysis, corporate and product strategy, product management and marketing. His current interests includeIT Ecosystems from cloud to the edge looking at the equipment [servers, IT networking and storage] and software, and physical infrastructure [power and cooling] needed for computation, with a focus on edge computing, silicon components included in IT equipment including coprocessors for AI and ML. Previously, Dr. Grossner was head of the Cloud and Data Center Research Practice, which he launched at Infonetics research and followed through transitions to IHS, IHS Markit and Informa Group. Prior to Infonetics, he held senior positions, including heading strategic marketing for Alcatel-Lucent's enterprise network business, tenures at Bell Labs, several startups and Nortel. He earned his Ph.D. at McGill University, and his Master of Science in Computer Science at Concordia University, winning national scholarships to support his graduate work. He holds more than 10 patents in computer networking, networking embedded security and telecommunications applications.

Ashish Nadkarni, Group Vice President and General Manager at <a href="https://www.idc.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">IDC</a>Ashish Nadkarni is Group Vice President and General Manager within IDC's worldwide infrastructure research organization. He leads two teams at IDC: one is focused on IDC’s worldwide infrastructure research and the other manages IDC’s BuyerView products. On the worldwide research side, Ashish and his team deliver qualitative and quantitative insights on computing platforms, storage systems, data logistics and protection, storage and compute infrastructure software platforms and technologies, service provider infrastructure, cloud and edge infrastructure services, and enterprise workloads. On the BuyerView products side, Ashish, and his team curate an industry leading of primary research products that provide a voice of the IT buyer on technology and services adoption trends such as cloud and edge infrastructure and services, artificial intelligence, high performance computing, security, networking, and software development. Ashish also takes a keen interest in tracking the ongoing influence of infrastructure, service provider, cloud and edge related open and open-source communities.

Rama Govindaraju, Director of Engineering at <a href="https://www.google.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">Google</a>Rama is a Director of Engineering at Google where he leads the Systems Infrastructure Architecture team. Prior to that Rama was a Distinguished Engineer at IBM responsible for leading the Software Architecture at IBM's Supercomputing Lab where he led the development of 5 generations of Supercomputers. Prior to that Rama received his MS and Phd in Computer Science from Rensselaer Polytechnic Institute in New York and BE in Computer Science from BIT Mesra, Ranchi, India.

Walter Abramsohn, Director of Product Marketing at <a href="https://www.proteantecs.com/" target="_blank" data-msys-clicktrack="0" rel="nofollow noopener noreferrer">proteanTecs</a>Walter Abramsohn is a seasoned hi-tech professional with a background in semiconductor, hardware system and datacenter operations. His vast experience covers hardware in board design, VLSI and FPGA designs, and software and cloud technologies involving AI and ML. His career spans companies including NetApp, Infineon Technologies and Juniper in roles ranging from R&amp;D and product management to product marketing. Walter currently serves as a director of product marketing at proteanTecs, where he oversees the company’s datacenter and system OEM go-to-market strategy. He holds a BSEE in electronics from Tel Aviv University. Presently based in Israel, Walter has lived and worked in both Silicon Valley, USA and in Israel.

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Addressing Silent Data Errors for Resilient Data Centers

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