Are you interested in 'test driving' the RTL code of one of one of the smallest and lowest power industrial CPU cores?

Do you want to build a mathematical co-processor in an hour and see how it accelerates your C program?

Have you always wanted to watch a processor in slow motion, then see the cache line fill from memory and the pipeline data moving through bypasses in real time?

If yes, then attend Wave Computing's inaugural MIPS Open Developer Day to do all this and more!

During this hands-on workshop, you'll have the opportunity to build a complete MIPS technology-based SoC from scratch, integrating an FPGA with a sensor and custom User Defined Instruction (UDI) co-processor.

Wave Computing's MIPS Open initiative provides developers open access to the latest version of the MIPS 32- and 64-bit instruction set architecture and microAptiv cores - free of charge, without licensing or royalty fees.

Who Should Attend

• Processor architects
• RTL designers moving into CPUs
• Embedded software engineers
• System-level EDA tool developers
• University professors a/o graduate students with an emphasis in engineering
• System-on-chip enthusiasts

What You Should Bring

A Windows or Linux notebook with three USB ports to connect with the FPGA board, the USB-to-UART cable and an external SSD . (*External SSDs will be provided.*)

Workshop Prerequisites

1. Sign up and activate a MIPS Open account - CLICK HERE
2. Accept the License Agreement and request the MIPS Open FPGA package in the downloads section - CLICK HERE