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Xilinx Signal Integrity Essentials Seminar

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Location

Legacy Town Center III

5801 Tennyson Parkway

Room: LTC3, Floor 1

Plano, TX 75024

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Event description
Signal Integrity 101 - Back to the Basics

About this Event

Signal Integrity should not be an after thought when it comes to robust PCB design. Come join us as Xilinx High Speed I/O and Signal Integrity Expert, John Lantz, explains the basics of robust SI design. This seminar will improve your understanding of good SI design techniques for High Speed Transcievers and DDR3/DDR4 Memory Interfaces for Xilinx devices.

Agenda:

8:30am: Continental Breakfast/Coffee

9am-12pm: SI Seminar

  • Via design and its’ impact on high-speed serial links
  • Frequency and time domain analysis
  • Backplane design considerations             
  • PCB materials specifications
  • Crosstalk
  • Return current discussion
  • Stack-up design
  • DDR3/DDR4 Memory design
  • DDR PCB Memory Timing
  • Transceiver Reference Clock Phase Noise Specifications

12pm-1pm: Lunch and Demos

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Date and Time

Location

Legacy Town Center III

5801 Tennyson Parkway

Room: LTC3, Floor 1

Plano, TX 75024

View Map

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