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The SFBAC (combined Santa Clara Valley, San Francisco, & Oakland/East Bay) IEEE Power Electronics Society (PELS) is very pleased to invite you to our February chapter meeting. We are excited and honored to have Michael Harrison, Senior Applications Manager at ST Microelectronics, to speak on the topic of “Coss Hysteresis in Advanced Superjunction MOSFETs” in regard to a deep-dive on understanding a loss mechanism in Zero Voltage Switching (ZVS) superjunction MOSFET applications that is not well understood and commonly overlooked. Additional event details can be found below.
In order to promote attendance and support other PELS activity, there is a registration fee for most attendees. Please note this is intended to be a free event so any fee collected (for this and future events) will be tracked and applied to the registrant for either IEEE PELS membership or future, major event (i.e. - workshop) registration fees.
Registration will be $5 at the door with no exceptions. You can register ahead of time without paying and make a food selection, but ALL ATTENDEES will be expected to pay at the door.
PELS WEBSITE LINK: http://ewh.ieee.org/r6/scv/pels/index.html
Coss Hysteresis in Advanced Superjunction MOSFETs
This presentation explores a previously unrecognized loss mechanism that has become prevalent with the on-going advancement of superjunction MOSFET technology. The presentation starts by demonstrating a general method to measure the output capacitance (Coss) related energy loss per switching cycle in power MOSFETs used in zero-voltage-switched (ZVS) applications. It is shown that a simple model using Coss in series with a resistance Ross is inadequate for describing the observed energy loss and a different model is needed. This work also shows that the traditional hard-switched test methods for measuring the dynamic performance of power MOSFETs are inadequate for describing the dynamic performance of power MOSFETs used in ZVS applications.
The presentation then introduces a Sawyer-Tower circuit which is employed to characterize the output capacitance (Coss) of advanced superjunction MOSFETs. It is shown that some of the most advanced superjunction MOSFETs exhibit significant hysteresis in their output capacitance which leads to unrecoverable power loss. This work shows that the conventional impedance analyzer method can only measure Coss accurately when hysteresis is not present while measurement of Coss with a Sawyer-Tower circuit gives accurate results regardless of whether hysteresis is present or not. Accurate measurement of Coss with a Sawyer-Tower circuit not only enables designers to more accurately calculate and predict power loss but even more importantly allows the power semiconductor industry to more effectively advance future generations of superjunction MOSFETs for optimum efficiency, especially for use in resonant converter applications.
About the speaker:
Michael Harrison received the NZCE degree from AUT University, New Zealand in 1988 and the BE degree from the University of Auckland, New Zealand in 1991. He is currently employed by ST Microelectronics in the capacity of Senior Applications Manager with a focus on Power Electronics Applications.
He holds over 30 international patents related to switched mode power conversion techniques. In previous employment, he has been involved in the research and development of Photo-Voltaic Micro-Inverters, telecommunications power conversion rectifiers, grid-tied inverters for distributed generation applications, and single-stage single-phase power-factor corrected converters.