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IEEE CASS-SCV Artificial Intelligence for Industry (AI4I) Forum - SPR2019

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International Technological University (ITU) Main Auditorium

2711 North 1st Street

San Jose, CA 95134

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CASS-SCV Artificial Intelligence for Industry (AI4I) Forum - Spring 2019

Event sponsored and organized by:

IEEE Circuits and Systems Society (CASS)

Co-sponsors:

DATE & TIME:

Wednesday, May 22nd, 2019. 1 PM - 5 PM

PROGRAM:

1:00 - 1:30 PM Check-in / Networking & Refreshments

1:30 - 2:15 PM Prof. Kurt Keutzer (UC Berkeley)

2:15 - 3:00 PM Mr. Lingjie Xu (Alibaba)

3:30 - 4:15 PM Prof. Yung-Hsiang Lu (Purdue University)

4:15 - 5:00 PM Dr. Pradeep Dubey (Intel)

5:00 PM Adjourn

LOCATION:

International Technological University, Main Auditorium

2711 N 1st St, San Jose, CA 95134 (between Montague & Trimble along N. 1st Street)

VT Light Rail access from downtown San Jose and Mountain View. In person attendance requested. Maximum capacity: 280. Please register to gaurantee seating.

AGENDA:

1:30 - 2:15 PM Prof. Kurt Keutzer (UC Berkeley)

TITLE: Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded Vision Applications

ABSTRACT: Deep Learning is arguably the most rapidly evolving research area in recent years. As a result it is not surprising that the design of state-of-the-art Deep Neural Net models proceeds without much consideration of the latest hardware targets, and the design of Neural Net accelerators proceeds without much consideration of the characteristics of the latest deep neural net models. In this talk we'll briefly review the latest DNNs for embedded computer applications, and their computational requirements. We'll then review the major architectural decisions for NN accelerators. Finally, we'll discuss current efforts to automate the matchmaking of DNNs and accelerators, and assess what is to be gained by doing so.

BIO: Kurt received his Ph.D. degree in Computer Science from Indiana University in 1984 and then joined the research division of AT&T Bell Laboratories. In 1991 he joined Synopsys, Inc. where he ultimately became Chief Technical Officer and Senior Vice-President of Research. In 1998 Kurt became Professor of Electrical Engineering and Computer Science at the University of California at Berkeley. Kurt’s research group is currently focused on using parallelism to accelerate the training and deployment of Deep Neural Networks for applications in computer vision, speech recognition, multi-media analysis, and computational finance. Kurt has published six books, over 250 refereed articles, and is among the most highly cited authors in Hardware and Design Automation. Kurt was elected a Fellow of the IEEE in 1996.

2:15 - 3:00 PM Mr. Lingjie Xu (Alibaba)

TITLE: Benchmarks for Post General Purpose Computing Era
ABSTRACT:
From tick-tock to process-architecture-optimization, general purpose computing is slowed down by invisible hand of economics. In the meanwhile, machine learning (ML) is driving the rise of specialized processors. The industry needs a broad benchmark suite for measuring ML hardware accelerators, as well as corresponding software frameworks and cloud platforms. In this talk, I will share stories of recent development in this field and discuss why a widely accepted benchmark suite will benefit the entire ecosystem.

BIO: Lingjie Xu is a director of Alibaba Cloud and he is in charge of heterogeneous computing infrastructure, including GPUs and AI ASICs. His team is currently focusing on applied AI architecture and SW/HW interplay. On September 2018, he launched AI Matrix benchmark suite for deep learning. He also represents Alibaba in MLPerf Community. Before joining Alibaba, he held various senior management and architect roles in NVIDIA, AMD and Samsung.

3:30 - 4:15 PM Prof. Yung-Hsiang Lu (Purdue University)

TITLE: Low-Power Computer Vision: Status, Challenges, and Opportunities

ABSTRACT: Energy efficiency plays a crucial role in making computer vision successful in battery-powered systems, including drones, mobile phones and autonomous robots. Since 2015, IEEE has been organizing annual competition on low-power computer vision to identify the most energy-efficient technologies for detecting objects in images. The scores are the ratio of accuracy and energy consumption. Over the four years, the winning solutions have improved the scores by a factor of 24. The speaker will describe this competition and summarize the winning solutions, including quantization and accuracy-energy tradeoffs. Based on technology trends, the speaker will identify the challenges and opportunities in enabling energy-efficient computer vision.

BIO: Yung-Hsiang Lu is a professor in the School of Electrical and Computer Engineering and (by courtesy) the Department of Computer Science of Purdue University. He is an ACM distinguished scientist and ACM distinguished speaker. He is a member in the organizing committee of the IEEE Rebooting Computing Initiative. He is the lead organizer of the first Low-Power Image Recognition Challenge in 2015, the chair (2014-2016) of the Multimedia Communication Systems Interest Group in IEEE Multimedia Communications Technical Committee. He obtained the Ph.D. from the Department of Electrical Engineering at Stanford University.

4:15 - 5:00 PM Dr. Pradeep Dubey (Intel)

TITLE: AI: What Makes it Hard and Fun!

ABSTRACT: The confluence of massive data with massive compute is unprecedented. This coupled with recent algorithmic breakthroughs, we are now at the cusp of a major transformation. This transformation has the potential to disrupt a long-held balance between humans and machine where all forms of number crunching is left to computers, and most forms of decision-making is left to us humans. This transformation is spurring a virtuous cycle of compute which will impact not just how we do computing, but what computing can do for us. In this talk, I will discuss some of the application-level opportunities and system-level challenges that lie at the heart of this intersection of traditional high-performance computing with emerging data-intensive computing.

BIO: Pradeep K. Dubey is an Intel Senior Fellow and director of the Parallel Computing Lab, a part of the Intel Labs organization at Intel Corporation. Since 2003, he has led a team of top researchers focused on state-of-the-art research in parallel computing. Dubey and his team are charged with defining computer architectures that can efficiently handle emerging machine learning/artificial intelligence, traditional HPC applications for data-centric computing environments, and deriving product differentiation opportunities for Intel’s CPU and GPU processing platforms. Dubey earned a bachelor’s degree in electronics and communication engineering from Birla Institute of Technology, India; a master’s degree in electrical engineering from the University of Massachusetts at Amherst; and a Ph.D. in electrical engineering from Purdue University. He was named a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2001 for his contributions to computer architecture supporting multimedia processing.

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International Technological University (ITU) Main Auditorium

2711 North 1st Street

San Jose, CA 95134

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