FREE PCI Express 3.0 Test Seminar and Hands-On Workshop
Thursday, November 21, 2013 from 9:45 AM to 2:30 PM (PST)
Santa Clara, CA
PCI Express 3.0 Test Seminar and Hands-On Workshop
IN PARTNERSHIP WITH:
Dates: Thursday, November 21, 2013
Time: 9:45am - 2:30pm
Location: Granite River Labs , 3500 Thomas Road, Suite A, Santa Clara, CA 95054
Granite River Labs is pleased to invite you to attend the PCI Express 3.0 Test Seminar and Hands-On Workshop in our Santa Clara lab. This session will be held on Thursday, November 21st and is free of charge. Space is limited - Click Here to Register Now! Complimentary lunch provided for all attendees.
This Seminar and Hands-On workshop will feature guests Rohit Bhasin from ElectoRent’s ATP team and Rick Eads and Thorsten Goetzelmann from Agilent. All three will share Agilent experiences and solutions in testing PCI Express 3.0 designs.
Whether you are experienced in PCI Express testing or just getting started down the path of compliance testing and debug of your PCI Express 3.0 design, this session is worth attending. Come spend a day in the lab with Agilent, GRL and Electro Rent learning how to perform compliance tests and go beyond compliance to understand the true performance of your design.
Seminar Agenda & Content:
9:45 – 10:15: Registration
10:15 – 10:30: Introduction to PCIe Architecture and Compliance Testing. Presented by Eugene Sushansky of Granite River Labs
10:30 - 12:00: PCIe 3.0 Transmitter Testing Features and Specifications. Testing PCIe 3.0 TX BASEand CEM tests, PCIe 3.0 Automation and Testing Ramifications of 16 GT/s for PCIe 4.0, followed by demo of BASE tests. Presented by Rick Eads of Agilent
12:00 – 12:30: Catered Lunch
12:30 – 1:00: PCIe 3.0 Protocol Compliance. Demonstration of Gen3 Protocol Compliance test and capture of test data using Gen3 PCIe Protocol Analyzer. Explanation of what is required to pass protocol compliance at PCI-SIG gold suite. Presented by Rohit Bhasin of Electro Rent
1:00 – 2:30: PCIe 3.0 Receiver Testing. Overview of BASE and CEM specifications as well as SRIS/SRNS/Common reference clock testing and understanding their differences. Demo will feature BASE specification testing. Presented by Thorsten Goetzelmann of Agilent
Labs feature Agilent Test Equipment: Agilent DSOX Series Real time Oscilloscopes, J-BERT high performance serial BERT and PCIe Gen 3 Protocol Analyzer and Protocol Test Card (PTC).
Please Register Now!
About the Presenters:
Rohit Bhasin, Digital Technical Sales Engineer with Electro Rent Corporation and part of the Agilent Technology Partner team. At Electro Rent, Rohit is responsible for technical sales and applications engineering of all Agilent PCI Express physical layer and protocol test solutions for Silicon Valley. Rohit earned degrees in Computer & Electrical Engineering with emphasis in computer architecture and design from The Pennsylvania State University in 2001. He has been working with PCI Express technology since its inception.
Thorsten Goetzelmann, Agilent Factory Product Manager joined Agilent's Optical Communications Measurement Division in 2000 and did his diploma thesis while at Agilent. In 2005 Thorsten joined the BERT marketing team as a product manager. In 2007 he became the Business Development Manager for BERTs in the Americas and since February 2013 he has been the BERT factory AE responsible for computer bus standards. He received a Diplom-Ingenieur (FH) Mechatronik/Feinwerktechnik degree from Fachhochschule Esslingen - Hochschule fuer Technik (University of Applied Sciences Esslingen).
Eugene Sushansky, GRL Director of Engineering manages GRL’s programs for SERDES characterization and hardware validation at GRL’s headquarters in Santa Clara. Prior to GRL, Eugene spent over 14 years at PLX Technology, a leading supplier of PCI Express semiconductor products. At PLX Eugene's engineering responsibilities included IC system architecture, design, verification, and validation for PCI Express and USB-related products. Eugene has been an active participant in the PCI-SIG committees.
About Granite River Labs
Granite River Labs (GRL) provides a range of Engineering Services & Test Solutions to help customers adopt High Speed Connectivity technologies from the IC to System level, including compliance testing, debugging, characterization, Signal/Power Integrity modeling & simulation, stress testing, benchmarking, and interoperability. GRL also provides Automated Test Solutions for Protocol Stress & Compliance, Scope Protocol Decode, and Receiver Test Automation. An Authorized Test Center for USB 2.0/3.0, Thunderbolt, DisplayPort, and SATA, GRL has deep expertise in a wide range of technologies including PCIe Gen3, 6G/12G SAS, USB 3.0, HDMI, MHL, DDR 2/3/4, 10Gb Ethernet, XAUI, and 10G-Base-CX/KR. GRL’s facilities are conveniently located in Silicon Valley, Taiwan (Hsinchu & Taipei), Bangalore India, and near Stuttgart Germany.
When & Where
Granite River Labs
GRL provides end-to-end Engineering Services and Test Solutions to help hardware engineers adopt high speed interfaces. A trusted partner of small up-and-coming hardware developers to some of the largest companies in the world, Granite River Labs combines recognized industry experts, high performance test equipment, automated test solutions, and convenient locations to provide the utmost in customer service and robust, user-friendly tools. Together we overcome challenges with designing and validating early stage products and new connectivity technologies.