#AskOski Live

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Got questions about formal sign-off? Submit them to #AskOski to have them answered in this live session.

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Register for #AskOski Live - A Decoding Formal Club online event

When: Thursday, September 24, 2020, 10:00am – 11:00am PDT


Sponsored by:  

Cadence Designs Systems

You’re invited to a live discussion session with Oski’s founder, Vigyan Singhal, where he will answer your questions live!

Sampling of questions asked and answered in the last session:

  • What size of design should we target for formal sign-off?
  • What are the criteria for formal sign-off?
  • How do symbolic constants help to reduce complexity?
  • Is it safe to merge coverage from simulation and formal?

Speaker bio: Vigyan Singhal is the founder and chairman of Oski Technology. He has worked in the semiconductor and EDA industries for more than 25 years. Previously he founded Jasper Design Automation, later acquired by Cadence. Vigyan has been applying formal verification on industrial designs since verifying simulation-resistant pieces of the PowerPC 601 at Motorola, post-silicon, in 1993. Later, Vigyan was at Cadence, where he built their first-general formal verification tool. He has authored more than 70 publications and holds 14 patents in IC design and verification. Vigyan has a PhD in EECS from the University of California at Berkeley and a BTech in Computer Science from IIT Kanpur where he graduated at the top of his class.

What is #AskOski?

#AskOski is an initiative undertaken by Oski Technology to create an interactive dialogue with the verification community and answer your questions regarding formal verification. Submit your questions here.

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Organizer Oski Technology

Organizer of #AskOski Live

Oski believes that solving the hardest problem in semiconductor design is the best way to make our clients unstoppable. Functional verification is the hardest problem, and our clients trust us to verify their most challenging designs to ensure the highest quality possible.

Our comprehensive methodologies are changing the course of semiconductor verification. We deliver functional sign-off of mission critical blocks early in the development cycle, which helps our clients reduce costs and tape out with confidence.

The design world has pivoted from chip technology to parallelism to keep performance and power efficiency marching forward. It’s impossible for even the most advanced simulation methodologies to find the extreme corner-case bugs that have followed. Since it’s inception in 2005, Oski has been pioneering novel verification methodologies that are required to deliver high quality designs in this new world.

More information about Oski Technology can be found at: www.oskitechnology.com.

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