of Silicon Valley Presents:

Silicon Convergence:  Creating system solution by merging coarse- and fine-grained programmable hardware

Speaker:   Ty Garibay, Altera.

Location:   Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (Building 10 map)

When:         September, 10:  6:30 pm Networking with food and beverage
                                     7:00 pm Presentation

Registration:     Free – but Please Register      [ $2 donation helps cover food ]

Please bring a print-out of your PDF ticket
After 2pm on the event date, tickets for live event are not available anymore. You are still welcome to sign-up at the door.

Abstract:

While continuing semiconductor miniaturization enables ever more complex systems, the cost and complexity of system innovation become increasingly out of reach.

A standard solution consisting of high performance processors, hardened peripherals, and a programmable logic fabric is ideal to address system integration challenges. Complementary to  similar advances in software, a host of hardware design tools and high-level programming methodologies are also making system design more user-friendly. Together these industry advances allow design teams to flexibly implement any system to achieve the sweet spot of performance and power dissipation according to team capabilities.

In his talk, Ty Garibay will share Altera’s view on silicon convergence, the integration of SoC and FPGA, and the direction the company is taking to increase system design efficiency through the use of high-level design languages and tools.

Bio:

Ty Garibay is the Vice President of Engineering for Embedded Processing at Altera Corporation. Previously, Ty was the Director of IC Engineering for the OMAP division in the Wireless Business Unit of Texas Instruments and was responsible for the development of TI's OMAP mobile application processors from architecture specification to production silicon.  In the more distant past, he spent almost 20 years designing microprocessors of many kinds, including low-power ARM and MIPS, and high-performance x86, MIPS, 68K and 88K.  Ty holds over 30 patents in the areas of computer architecture, circuit design, design methodology and design for test. Ty received his BSEE and BA Foreign Languages from Southern Methodist University in 1986.

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