System Reliability with Competing Components and Load Sharing - A Hard Disk Drive Perspective
Thursday, July 31, 2014 from 6:00 PM to 7:30 PM (PDT)
Santa Clara, CA
Come join ASME Silicon Valley Section Technical Dinner Talk
"System Reliability with Competing Components and Load Sharing – A Hard Disk Drive Perspective"
Feng-Bin (Frank) Sun, PhD, Senior Technologist of Reliability Engineering
HGST, a Western Digital Company, San Jose, CA
Earn 1.0 Professional Development Hours*
In this fast growing information world, the most widely used data storage device nowadays is the hard disk drive (HDD). HDD reliability is the most critical factor to data integrity and data availability, and has attracted untiring studies over the years. Among all the components and failure sources, the head-disk interface (HDI) is the most critical area that contributes and dominates the modern HDD top failure paretos. HDI is constructed in nm (nanometer) order, and the HDD has been said to be one of the very first mechatronic devices that realized the use of nano-technology in high volume production.
This talk presents a quantitative insight of a long argued question in hard disk drive (HDD) industry about the reliability effects of the number of head-disk interfaces (HDI). Some people believe that data transfer is more dominating than complexity (number of HDIs) while others believe the otherwise. The historical reliability test data behaves both ways depending on product and failure mechanisms. A theoretical model is developed to quantify the competition between complexity and data transfer load from system reliability perspective: competing components with load sharing. Product failure probability ratio and steady-state MTTF ratio between different data storage capacities are derived in terms of their head-disk interface number ratio and data transfer ratio. It was found that the reliability dominance of these two factors is conditional to the mathematical characteristics of their governing failure physics. The detailed discussion is conducted on the system reliability with head-disk interface failures governed by Weibull life distribution and Inverse Power Law stress-life relationship.
Dr. Feng-Bin (Frank) Sun is currently a Senior Technologist of Reliability Engineering at HGST, a Western Digital Company, with over 25 years of industry and academia experience. Prior to joining HGST, he worked at the Advanced Reliability Engineering of Western Digital Corporation as a Technical Team Leader from 2003 to 2010 and at Maxtor-Quantum Corporation as a Senior Staff Reliability Engineer from 1997 to 2003. He has published two books, both by Prentice Hall, and over 35 papers in various areas of reliability, maintainability and quality engineering. He received his B.S. degree in Mechanical Engineering from Southeast University (China), M.S. degree in Reliability from Shanghai University (China), and Ph.D. in Reliability from University of Arizona. Dr. Sun served in the editorial board as an Associate Editor for the IEEE Transactions on Reliability from 1999 to 2003, and a committee member and session moderator of numerous international conferences on reliability. He is a member of ASQ & IEEE and the secretary for Society of Reliability Engineers (SRE) Silicon Valley Chapter. He is also the program manager in charge of ASQ Reliability Webinar Mandarin Series. Early this year, Dr. Sun received the A.O. Plait Best Tutorial Award from the Annual Reliability and Maintainability Symposium (RAMS, the most premier event in reliability community). He is now in the editorial board of the new open access journal titled "Advances in Reliability" (AiR) and is the Program Chair of 2014 ISSAT International Conference on Reliability and Quality in Design.
This event is graciously hosted by Electronic Cooling Solutions **
2915 Copper Road, Santa Clara, CA 95051
Dinner will be provided.
For any questions, please contact: asme.scvs (at) gmail.com.
PROGRAM (all times US Pacific):
- 6:00 PM ~ 6:30 PM: Registration, Networking, and Dinner
- 6:30 PM ~ 7:15 PM: Technical Talk
- 7:15 PM ~ 7:30 PM: Q&A and Networking
- 7:30 PM: Event ends
* Each engineer must determine whether this seminar meets the Board's requirements. PDH will be awarded if requested at the end of event. 1.0 PDH will be awarded for attending the entire seminar including Q&A session.
** Ever-increasing power density drives the need for high-quality and cost-effective thermal management resource. Electronic Cooling Solutions is that resource. We use state-of-the-art simulation and measurement tools and employ design and analysis methodologies that can be scaled to address emerging thermal challenges. This leads to a better thermal design..
Thank you to all the sponsors of the ASME Silicon Valley Section for making events such as these possible
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