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IEEE Computer Society Chapter of Silicon Valley Monthly Technical Meeting

Right-Sizing Precision: Save Energy, Power, and Storage

IEEE Computer Society of Silicon Valley

Tuesday, March 12, 2013 at 6:30 PM (PDT)

San Jose, CA

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Event Details

 


of Silicon Valley Presents:

 

Right-Sizing Precision
Save Energy, Power, and Storage

 

Date: Tuesday, March 12, 2013

Speaker: John Gustafson, Senior Fellow, AMD

Time: 6:30 PM (PT) Networking/Refreshments, 7:00 PM Presentation

Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)

 

Abstract:

Most computer programs use far more precision than needed, because programmers find it easier to use excess precision as insurance against rounding or overflow errors instead of analyzing what precision is actually needed. Sometimes we might actually need more precision. We are attempting ever more ambitious calculations with ever less attention to numerical analysis. While this may sound like an arcane issue, it hits the energy and power budget hard because so much energy is wasted moving excess bits between memory and processor. There are a number of interesting approaches for “right-sizing” the precision we use that don’t require programmers to become experts at numerical analysis. A particularly intriguing approach is that the way we represent numbers in computers could be made self-descriptive and accuracy-aware, bringing us closer to the goal of automatic and economical control of rounding errors.


Speaker bio:

Dr. John Gustafson is Senior Fellow at AMD, where he serves as Chief Product Architect for Graphics. He is a 35-year veteran of the computing industry, and comes to AMD from Intel, where he directed the company’s eXtreme Technologies Lab. Prior to that, he served as CEO at Massively Parallel Technologies, and CTO at ClearSpeed Technology, a high-performance computing company. John has also held key management and research positions at numerous companies including Sun Microsystems, Ames Laboratory, and Sandia Laboratories. John holds an M.S. and Ph.D. in applied mathematics from Iowa State University, and a B.S. in the same from Caltech. He holds numerous patents and has authored an extensive array of technical publications.


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Have questions about Right-Sizing Precision: Save Energy, Power, and Storage? Contact IEEE Computer Society of Silicon Valley

When & Where


Cadence Design Systems, Bldg 10
Montague Expy & Trimble Road
San Jose, CA 95134

Tuesday, March 12, 2013 at 6:30 PM (PDT)


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