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IEEE Computer Society Chapter of Silicon Valley Monthly Technical Meeting

Memristors in Computing - Promises and Challenges

IEEE Computer Society of Silicon Valley

Tuesday, August 9, 2011 from 6:30 PM to 8:30 PM (PDT)

San Jose, CA

Memristors in Computing - Promises and Challenges

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Memristors in Computing - Promises and Challenges
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Event Details


of Silicon Valley presents

Memristors in Computing:
Promises and Challenges

 

Cosponsors:     IEEE Circuits and Systems Chapter, IEEE Solid States Circuits Chapter

Speaker:         Jianhua (Joshua) Yang, PhD, HP Labs
 
Location:
       Cadence Design Systems
(Building 10)
                       
2655 Seely Ave, San Jose, CA   
 
When:
              August 9: 6:30 pm Networking with food and beverage
                                          7:00 pm Presentation

Registration:
    Free  –  but Please Register!        [$2 donation helps cover food]

Abstract:
The desire to continually improve computing systems drives both the relentless scaling of existing silicon integrated circuit technology and the search for new technologies. To be relevant, new devices must be both nanoscale and extremely capable. Memristors appear to fulfill these requirements and have recently been recommended for additional focus in research and development by the International Technology Roadmap for Semiconductor (ITRS). Memristors are two-terminal devices that retain state, which provides many useful properties to complement transistors while enabling increased functionality in integrated circuits. I will first describe the working mechanism of metal-oxide memristors and a related family of nanodevices, and then discuss their potential applications. Some of the challenges with respect to realizing the promise of these circuit elements are presented, together with the recent significant progress.


Bios:
Jianhua (Joshua) Yang is a senior scientist at Hewlett-Packard Labs.  He obtained his PhD in Material Science Program from the University of Wisconsin – Madison in 2006. His research interest is Nanoelectronics, where he has authored and co-authored over 100 papers in academic journals and conferences and holds 2 granted and over 50 pending US Patents. Serving as a guest editor, he has recently organized two special issues on Non-volatile Resistive Random Access Memory (NV-RRAM) with other experts in the field for academic journals, including Nanotechnology and Applied Physics A. He is also an associate editor of Applied Physics A.


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Thanks
to those sponsoring part of our pizza this meeting:

TBD – Recruiters like sponsoring us…
TBD – Your company here…
TBD – Providing services…


Have questions about Memristors in Computing - Promises and Challenges? Contact IEEE Computer Society of Silicon Valley

When & Where


Cadence Design Systems, Bldg 10
Montague Expy & Trimble Road
San Jose, CA 95134

Tuesday, August 9, 2011 from 6:30 PM to 8:30 PM (PDT)


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