Delhi Dec Event
Thursday, December 22, 2011 from 9:00 AM to 2:00 PM (IST)
Uttar Pradesh, India
We have an exciting line up for this Winter DVClub Event in Delhi NCR.
* Guidelines to efficiently migrate Legacy Verilog testbenches to UVM ( Freescale )
* Challenges faced in randomizing SV based Mixed Signal Simulation Environments ( Freescale )
* Verification Automation using IPXACT ( Rohit Jindal, ST )
* Transaction Based Approach for Emulation Platform ( Harminder Bagga, ST )
* Generic and Automatic Verification Environment for Image Signal Processing IPs ( Abhishek Jain, ST )
* System Verilog Assertions Quiz ( Nitin Ahuja, Agnisys )
Limited seats available, sign up today!
Visit our website: www.dvclub.org
The principal goal of DVClub is to have fun while helping build the semiconductor verification community through quarterly educational and networking events. DVClub currently has chapters in Austin, Bangalore, Boston, Bristol, Dallas, Eindhoven, Delhi, RTP, San Diego, Toronto, and Silicon Valley.
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