The ARM Processor Roadmap Deciphered
- Science & Technology
- Cadence Design Systems, Bldg 10, San Jose CA
of Silicon Valley Presents:
Speaker: Tom DeCanio, Networking & Security Applications Architect, Tilera Corporation
Time: 6:30 PM (PT) Networking/Refreshments, 7:00 PM Presentation
Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
Tilera processors provide a standard Linux platform, which can process very high throughput network traffic. With cyber attacks becoming more frequent, organized and costly in the damage they inflict on governments, businesses, and critical infrastructure, there is a significant need for hardware and software that can process live network traffic and prevent such attacks. The combination of Suricata, a high performance network intrusion detection and prevention system sponsored by the US government and the Tilera-based platforms, compacting up to 288 cores and 32 10Gbps ports in a 1U chassis, provides the highest performance and performance-per-watt-per-rack-unit system designed to detect and prevent malware, botnets, spyware, spam, worms, backdoor exploits, Trojans and zombie machines.
This talk will examine, in detail, how the features of the TILE-GX processor and the on-chip mesh intelligent packet processor (mPIPE) are leveraged to implement the Suricata functions and deliver high performance.
Tom DeCanio has more than 25 years in software development specializing in network communications and security applications. At Tilera Corporation, the developer of the highest performance, low power general purpose manycore processors, Tom is in charge of developing and maintaining the port of Suricata IDS/IPS for the Tilera TILE-Gx processor family. Tom is also working closely with several customers on their application development efforts. He is also a Qosmos Expert Developer (QED) partner developing applications utilizing Qosmos DPI software (ixEngine).
Tom holds a bachelors of science in computer science from the University of Illinois at Urbana-Champaign.
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